Verification Manager-Hyderabad

  Verification Manager0Hyderabad, India
About Company:

Vitesse is seeking an experienced Design Verification Manager for their ASIC verification team in Hyderabad. Responsibilities include but are not limited to developing verification methodologies, keeping reuse and efficiency in perspective, architecting the test-bench to enable verification of corner cases with any kind of configurations specifically in SV-OVM, planning the verification for the entire chip from the architecture specification,
selecting tools, and automating the TB environment through scripting. The candidate will work closely with the design team and other verification teams across the company to establish best in class verification techniques and methodologies to be implemented on the next generation of designs.

Company Name: Vitesse Semiconductor Corporation

Job Role: Verification Manager

Job Code: 3755

Category: Engineering

Location: Hyderabad, India

Experience: 3-5 years

Required Qualifications:
  • 10+ years of ASIC verification experience
  • 7+ years of direct verification experience
  • 5+ years of leading and managing a verification team
  • Thorough knowledge of ASIC verification flow, and latest methodologies
  • Strong implementation experience in SV-OVM
  • Verification architecture experience with advanced configuration capabilities
  • Experience with setting team objectives and goals, monitor progress, managing group dynamics and motivating team members
  •  Maintain a challenging and engaging environment that promotes teamwork, creativity, accountability, and professional development
  • Must possess exceptional interpersonal, analytical, and communications skills
  • Must be able to manage projects, coordinate resources and have demonstrated leadership skills
  •  Preferred Qualifications:
  • Previous experience in semiconductor industry, with a comprehensive understanding of Networking protocols and Ethernet switches
  • Strong programming skills in object oriented programming
  • Programming skills and experience in Unix, Perl, etc.
  • Strong programming skills in Verilog HDL / VHDL and HVL’s such as SystemC, Specman (e), SystemVerilog, Vera, etc.
  • Good at digital design aspects and ability to read designs
Education Requirements:
  • Bachelor’s degree in Engineering required. Master’s degree preferred.
  • Vitesse offers a competitive salary and comprehensive benefits packages.
  • We are an equal opportunity employer EEO/M/F/D/V.


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